Code cleanup

firmware/Cargo.lock

@@ -2151,7 +2151,6 @@ dependencies = [
  "document-features",
  "embassy-sync 0.7.2",
  "esp-hal",
- "log",
  "ouroboros",
 ]
 

firmware/acid-firmware/Cargo.toml

@@ -89,7 +89,7 @@ esp-metadata-generated = { version = "0.3.0", features = ["esp32s3"] }
 hex = { version = "0.4.3", default-features = false, features = ["alloc"] }
 indoc = "2.0.7"
 ouroboros = "0.18.5"
-esp-hal-bounce-buffers = { git = "https://forgejo.limeth.cz/limeth/esp-hal-bounce-buffers", rev = "8d3763a190368f476aed6d98777264c959bfdc2d", features = ["esp32s3", "log"] }
+esp-hal-bounce-buffers = { git = "https://forgejo.limeth.cz/limeth/esp-hal-bounce-buffers", rev = "8d3763a190368f476aed6d98777264c959bfdc2d", features = ["esp32s3"] }
 
 # A fork of slint with patches for `allocator_api` support.
 # Don't forget to change `slint-build` in build dependencies, if this is changed.

firmware/acid-firmware/src/logging.rs

@@ -2,6 +2,7 @@ use core::fmt::Arguments;
 
 use log::LevelFilter;
 
+// TODO: Replace with `log`'s `STATIC_MAX_LEVEL` set via crate features.
 pub const LOG_LEVEL_FILTER: LevelFilter = {
     if let Some(string) = option_env!("ESP_LOG") {
         if string.eq_ignore_ascii_case("OFF") {

firmware/acid-firmware/src/peripherals/st7701s/init_sequence.rs

@@ -1,125 +1,13 @@
 use alloc::{boxed::Box, vec, vec::Vec};
-use core::iter::once;
-use embassy_time::{Duration, Timer};
-use esp_hal::gpio::{Flex, Level, Output};
 use lazy_static::lazy_static;
 
-use crate::peripherals::st7701s::Command;
-
-async fn spi_delay() {
-    Timer::after(Duration::from_micros(1)).await;
-}
-
-async fn spi_dummy_bit(sck: &mut Output<'_>) {
-    sck.set_low();
-    spi_delay().await;
-    sck.set_high();
-    spi_delay().await;
-}
-
-async fn spi_write_bit(bit: bool, mosi: &mut Flex<'_>, sck: &mut Output<'_>) {
-    mosi.set_level(if bit { Level::High } else { Level::Low });
-    sck.set_low();
-    spi_delay().await;
-    sck.set_high();
-    spi_delay().await;
-}
-
-async fn spi_read_bit(mosi: &mut Flex<'_>, sck: &mut Output<'_>) -> bool {
-    sck.set_low();
-    spi_delay().await;
-    sck.set_high();
-    spi_delay().await;
-    mosi.is_high()
-}
-
-async fn spi_write_bits(
-    bits: impl Iterator<Item = bool>,
-    mosi: &mut Flex<'_>,
-    sck: &mut Output<'_>,
-) {
-    for bit in bits {
-        spi_write_bit(bit, mosi, sck).await;
-    }
-}
-
-async fn spi_write_word(is_param: bool, data: u8, mosi: &mut Flex<'_>, sck: &mut Output<'_>) {
-    assert!(sck.is_set_high());
-    spi_write_bits(
-        once(is_param).chain((0..8).map(|i| (data >> i) & 1 != 0).rev()),
-        mosi,
-        sck,
-    )
-    .await;
-}
-
-pub async fn spi_write(
-    command: u8,
-    args: impl IntoIterator<Item = u8>,
-    mosi: &mut Flex<'_>,
-    sck: &mut Output<'_>,
-    cs: &mut Output<'_>,
-) {
-    cs.set_low();
-    spi_write_word(false, command, mosi, sck).await;
-
-    for arg in args {
-        spi_write_word(true, arg, mosi, sck).await;
-    }
-
-    cs.set_high();
-}
-
-#[expect(unused)]
-pub async fn spi_read(
-    command: u8,
-    dummy_cycle: bool,
-    mosi: &mut Flex<'_>,
-    sck: &mut Output<'_>,
-    cs: &mut Output<'_>,
-    output_buffer: &mut [u8],
-) {
-    output_buffer.fill(0);
-
-    cs.set_low();
-    spi_write_word(false, command, mosi, sck).await;
-
-    mosi.set_output_enable(false);
-    mosi.set_input_enable(true);
-
-    if dummy_cycle {
-        spi_dummy_bit(sck).await;
-    }
-
-    for output_byte in output_buffer {
-        for i in (0..8).rev() {
-            if spi_read_bit(mosi, sck).await {
-                *output_byte |= 1 << i;
-            }
-        }
-    }
-
-    mosi.set_input_enable(false);
-    mosi.set_output_enable(true);
-
-    cs.set_high();
-}
-
-use crate::peripherals::st7701s::*;
+use crate::peripherals::st7701s::commands::*;
 
 // struct InitSequenceAction {
 //     command: ArrayCommand<8>,
 //     sleep: u64,
 // }
 
-// pub const INIT_SEQUENCE: [InitSequenceAction; _] = [CmdCn2bkxsel(
-//     CmdCn2bkxselArg0::new(),
-//     CmdCn2bkxselArg1::new(),
-//     CmdCn2bkxselArg2::new(),
-//     CmdCn2bkxselArg3::new(),
-//     CmdCn2bkxselArg4::new().with_bksel(0x3).with_cn2(true),
-// )];
-
 lazy_static! {
     pub static ref INIT_SEQUENCE_COMMANDS: Vec<(Vec<Box<dyn Command + Send + Sync>>, u64)> = vec![
         (vec![

firmware/acid-firmware/src/peripherals/st7701s/spi.rs

@@ -0,0 +1,102 @@
+use core::iter::once;
+use embassy_time::{Duration, Timer};
+use esp_hal::gpio::{Flex, Level, Output};
+
+async fn spi_delay() {
+    Timer::after(Duration::from_micros(1)).await;
+}
+
+async fn spi_dummy_bit(sck: &mut Output<'_>) {
+    sck.set_low();
+    spi_delay().await;
+    sck.set_high();
+    spi_delay().await;
+}
+
+async fn spi_write_bit(bit: bool, mosi: &mut Flex<'_>, sck: &mut Output<'_>) {
+    mosi.set_level(if bit { Level::High } else { Level::Low });
+    sck.set_low();
+    spi_delay().await;
+    sck.set_high();
+    spi_delay().await;
+}
+
+async fn spi_read_bit(mosi: &mut Flex<'_>, sck: &mut Output<'_>) -> bool {
+    sck.set_low();
+    spi_delay().await;
+    sck.set_high();
+    spi_delay().await;
+    mosi.is_high()
+}
+
+async fn spi_write_bits(
+    bits: impl Iterator<Item = bool>,
+    mosi: &mut Flex<'_>,
+    sck: &mut Output<'_>,
+) {
+    for bit in bits {
+        spi_write_bit(bit, mosi, sck).await;
+    }
+}
+
+async fn spi_write_word(is_param: bool, data: u8, mosi: &mut Flex<'_>, sck: &mut Output<'_>) {
+    assert!(sck.is_set_high());
+    spi_write_bits(
+        once(is_param).chain((0..8).map(|i| (data >> i) & 1 != 0).rev()),
+        mosi,
+        sck,
+    )
+    .await;
+}
+
+pub async fn spi_write(
+    command: u8,
+    args: impl IntoIterator<Item = u8>,
+    mosi: &mut Flex<'_>,
+    sck: &mut Output<'_>,
+    cs: &mut Output<'_>,
+) {
+    cs.set_low();
+    spi_write_word(false, command, mosi, sck).await;
+
+    for arg in args {
+        spi_write_word(true, arg, mosi, sck).await;
+    }
+
+    cs.set_high();
+}
+
+#[expect(unused)]
+pub async fn spi_read(
+    command: u8,
+    dummy_cycle: bool,
+    mosi: &mut Flex<'_>,
+    sck: &mut Output<'_>,
+    cs: &mut Output<'_>,
+    output_buffer: &mut [u8],
+) {
+    output_buffer.fill(0);
+
+    cs.set_low();
+    spi_write_word(false, command, mosi, sck).await;
+
+    mosi.set_output_enable(false);
+    mosi.set_input_enable(true);
+
+    if dummy_cycle {
+        spi_dummy_bit(sck).await;
+    }
+
+    for output_byte in output_buffer {
+        for i in (0..8).rev() {
+            if spi_read_bit(mosi, sck).await {
+                *output_byte |= 1 << i;
+            }
+        }
+    }
+
+    mosi.set_input_enable(false);
+    mosi.set_output_enable(true);
+
+    cs.set_high();
+}